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The Qualcomm DragonwingTM IQ-8275 Evaluation Kit (EVK) has Qualcomm IQ-8275 SoC mounted on the mainboard. Learn more about the system block diagram, electrical design, features, and capabilities of the EVK.

System block diagram

The following figure shows the system block diagram of the Dragonwing IQ-8275 EVK platform. This figure provides a visual representation of the platform’s architecture, highlighting the main components and their interactions. Figure : Dragonwing IQ-8275 EVK system block diagram

Hardware specification

The following table outlines the key hardware specification of the Dragonwing IQ-8275 EVK. Note For the list of interfaces supported in this release, see the Qualcomm Linux 2.0 Release Notes. Table : Dragonwing IQ-8275 EVK key specifications
Interface or featureDescription
SoCIQ-8275
Memory4 × 16 bit 12 GB LP5 3200 MHz (2 x 6 GB LPDDR5)
PMIC2 × PMM8620AU
External MCUNot present
Storage1 × 128 GB UFS, micro-SD card or eMMC on main card, 1 x EEPROM for MACs.
DisplayFour display ports:
• 2 × mini-DP (through KTM switch)
• DSI flex connection (display not included)
DSI flex connection with touchscreen
Camera/Video input3 × Quad deserializers
3 × CSI (C-PHY or D-PHY) cameras
USBUSB0 Type-C (host or device mode)
USB1 uUSB 2.0 (host or device mode)
WLAN/Bluetooth®M.2 module (NFA765A)
2 × printed antennas (Bluetooth shared with one WLAN antenna)
PCIeMainboard supported or expanded options (selected through switch):
• 1 × PCIe x4 slot or expansion (switch)
• 1 × M.2 E key (WI-Fi) or expansion (switch)
• QPS615 PCIe expansion is supported through a mezzanine board.
Audio1 × I2 S mic
2 × I2 S speaker amps
Additional I2 S on GPIOs
EthernetRJ45 2.5 GbE MD
Additional ethernet ports can be added using mezzanine interface cards.
CAN/CAN-FD1 × CAN/CAN-FD on low speed header on mainboard
Low-speed expansion3.3 V header for developer community with CAN, SPI, I2 C, UART, I2 S
Second low-speed expansionQUPs and GPIOs on mezzanine connectors
SensorsIMU: ICM-42688
QUPs on expansion
Trusted platform module (TPM)ST33HTPH2x32AHE4 on mainboard

Exterior view

The following figures show the exterior of the Dragonwing IQ-8275 EVK with the bottom case. Figure : Exterior view of the EVK with bottom case The following figures show the side views of the Dragonwing IQ-8275 EVK, with labeled ports, connectors, and switches. The following figure shows the top view of the core board. Figure : Top view of the core board

EVK ports and interfaces

The following figure shows a detailed view of all the connectors on the Dragonwing IQ-8275 EVK. Figure : Connectors on Dragonwing IQ-8275 EVK The following figure shows the platform with few cables plugged in. Figure : Platform with cables plugged in Table : Connectors and functions
ConnectorsFunctions
JPWRDC power (barrel connector) plug, 12 V–36 V input voltage
JLS1Low speed IO header receptacle (LS1)
SW18 position surface mount DIP switch
SW24 position surface mount DIP switch
SW36 position surface mount DIP switch
JCAM0MIPI CSI0 camera interconnect receptacle
JCAM1MIPI CSI1 camera interconnect receptacle
JCAM2MIPI CSI2 camera interconnect receptacle
JPCIEPCI Express v4 receptacle connector (PCIe1)
JEDP1EDP1 connector
JEDP0EDP0 connector
JETHEthernet connector (2.5 GbE)
JUSB1USB-C (USB Type-C) receptacle connector for USB1
JUSB0USB-C (USB Type-C) receptacle connector for USB0
J13Antenna for WLAN
S4Slide switch for power or automation control
JDISPConnector for DSI display
JTACMicro-USB receptacle for debug UART
JTAGHeader connector for JTAG
J14Antenna for WLAN/Bluetooth
JEXP1–JEXP4Board-to-board 120 position connector receptacle

DIP switch

The following images show the location of the DIP switches on the mainboard. Figure : DIP switches 1, 2, and 3 on Dragonwing IQ-8275 EVK Note If a DIP switch is facing up, it indicates that the switch is on. The following table details DIP switch operations for the Dragonwing IQ-8275 EVK, including functions and settings for board configuration. Table : DIP switch position and its respective functions
SwitchConnection when ONConnection when OFF (default from factory)Notes
SW1-1PCIe0 is routed to mezzaninePCIe0 is connected to the mainboard Wi-Fi moduleNone
SW1-2PCIe1 is routed to mezzaninePCIe1 is connected to the mainboard PCIe connectorNone
SW1-3NCNCNone
SW1-4DSI0 routed to mezzanineDSI0 routed to mainboard DSI flex connectorNone
SW1-5CSI0 is routed to mezzanineCSI0 is routed to the mainboard CSI flex connectorNone
SW1-6CSI1 is routed to mezzanineCSI1 is routed to the mainboard CSI flex connectorNone
SW1-7CSI1 is routed to mezzanineCSI2 is routed to the mainboard CSI flex connectorNone
SW1-8SDC signal will be routed to SD cardSDC signal will be routed to eMMCNone
SW2-1Main domain forced USB boot/EDLNo impactCurrently, this switch isn’t enabled in software.
SW2-2Main domain fast bootNo impactNone
SW2-3Main domain and RTSS domain forced USB boot/EDL (combined)No impactCurrently, the software implementation puts both domains into EDL mode together. It’s important for software download.
SW2-4RTSS domain Fastboot modeNo impactNone
SW3-1OSPI is routed to mezzanineOSPI is connected to onboard memory for MCUNone
SW3-2Force MD and MCU PS_HOLDNo impactNone
SW3-3Watchdog is disabledRAM dump is enabledNone
SW3-4Boot from eMMCBoot from UFSeMMC located on interface and mezzanine
SW3-5EUD enableNo impactNone
SW3-6Skip MD BISTNo impactNone
SW4-1PWM-MODE for fan set to lowPWM-MODE for fan set to highDon’t change.
SW7-1RGMII voltage select 2.5VRGMII voltage select 1.8VNone
SW9-1USB to m.2 connector for NFA765 module on mezzanineUSB to m.2 connector for NFA765 module on mainboardNone
SW8-1RTSS CAN GPIOs routed to mezzanineRTSS CAN GPIOs routed to JLS1 connectorNone
S17EMMC_THERM selectedUFS THERM selectedNone
S18UFS2.1 or eMMC version selectedUFS3.1 version is selectedNone
S19USB1_HS port selectedUSB0_HS port is selectedNone
S20USB1_SS port selectedUSB0_SS port is selectedNone

LEDs

The Dragonwing IQ-8275 EVK has status LEDs that monitor system functions such as power-on and board faults, crucial for debugging and bringup. The following table lists and summarizes the functions of the LEDs. The Connectors on Dragonwing IQ-8275 EVK shows the location and the LEDs present on the board. Table : Summary of reference designator, location, color, and function of LEDs
Reference designatorLocationColorFunction
DS1MainboardGreenReserved for debugging
DS8MainboardGreenEthernet status LEDs
DS9MainboardGreen
DS10MainboardGreen3.3 V LED
DS11MainboardOrange3.3 V LED

Hardware components and interfaces

The following are the high-level details of the Dragonwing IQ-8275 processor, power supply, memory, and various interfaces, such as camera, USB, and DisplayPort. It also includes sensors, flash memory, expansion options, a debug interface, audio support, thermal management, fan control, and accessory boards.

Processor

The target processor used in the Dragonwing IQ-8275 EVK is the Dragonwing IQ-8275 SoC, also known as the QCS8275. This SoC features an octa-core Kryo Gen 6 CPU built on Arm v8.2 Cortex technology, with clock support up to 2.35 GHz. In addition to the eight high-performance CPU cores, the SoC includes a GPU and a Hexagon Tensor Processor with vector and matrix extensions, enabling the management of various concurrent compute and AI workloads simultaneously. The SoC offers extensive peripheral support, including integrated Ethernet, USB, Wi-Fi, PCIe, and Bluetooth. It’s capable of delivering up to 40 TOPS, making it suitable for powering high-performance, AI-centric, and Edge AI industrial use cases. The target applications include:
  • Factory automation
  • Industrial robots
  • Industrial personal computers
  • Drones
  • Edge AI Boxes
  • Machine Vision
  • Autonomous Mobile Robots (AMRs)
  • Industrial gateways

Power

The main power input to the Dragonwing IQ-8275 board is provided through the 2.10 mm barrel jack connector (JPWR, JACK-C-PC-10A-RA(R)), supporting an input voltage range of 12 V to 36 V. The EVK also includes a Type-C to barrel plug adapter. Four power management ICs manage the respective power supplies to various system blocks, including the SoC, PMIC, PCIe, and expansion ports.

Memory

The IQ-8275 EVK has two 6 GB LPDDR5 SDRAM ICs.

Camera interface

An analog switch is used for each MIPI CSI interface, allowing the MIPI CSI interfaces to be accessible through both the JCAM camera interconnect receptacle and the B2B expansion connector (JEXP4). To use a GMSL camera with the Dragonwing IQ-8275 EVK, connect it through the GMSL mezzanine, which must be ordered separately. The CSI ports are routed through the DIP switches, allowing configuration and setup. The three MIPI CSI ports operate in either C-PHY or D-PHY mode and support a range of existing cameras and flex cable. The following block diagrams show various CSI interfaces.
Figure : Camera CSI0 interfaces Figure : Camera CSI1 interfaces Figure : Camera CSI2 interfaces

USB interface

The board features three USB connectors: two Type-C connectors (JUSB0 and JUSB1) and one micro-USB connector (JUSB2). The following figures show the USB interfaces and configuration. USB0-SS interfaces and configuration USB0-HS interfaces and configuration USB2-HS interfaces and configuration USB interfaces and configuration

DisplayPort (eDP) interface

The target processor is equipped with 1 x eDP interface. EDP0 is routed to LT8713 EDP bridge as shown, with also a BYPASS option to JEDP0. The following figure shows the eDP interfaces and configuration. eDP interfaces and configuration

DSI interface

The IQ-8275 processor supports one 4-lane MIPI-DSI with VESA DSC v1.2. The Dragonwing IQ-8275 EVK uses an analog switch for DSI0 interface, allowing the interface to be accessible through both the JDISP LCD receptacle and the B2B expansion connector (JEXP1). The following figure shows the DSI connectors Figure : DSI connectors

Storage interfaces

The Dragonwing IQ-8275 has three types of storage interfaces: secure digital (SD) card, universal flash storage (UFS), and electrically erasable programmable read-only memory (EEPROM).

SD card

The target processor supports a single SDIO interface (SDC1). The SDC pins are routed through analog switches to facilitate connections through the micro SD card connector (JSDC) on the board, and eMMC (U150). The following figures show the SD card interfaces and configuration. SDIO card interfaces and configuration SD card interfaces and configuration

UFS

The target processor supports 1 x UFS 3.1 Gear 4 interface. UFS0 serves as the main domain boot-up device. The following table lists the part numbers and manufacturers of these UFS devices. Table : Part numbers and manufacturers of UFS devices
Reference designatorInterface identifierMPNManufacturerDescription
U38UFS0THGJFGT0T25BAB8KIOXIA AMERICA INC128 GB UFS3.1 (Gear4) Q100-GR2 RoHS
The following figure shows the UFS interfaces and configuration. UFS interfaces and configuration

EEPROM

The Dragonwing IQ-8275 EVK platform has a single EEPROM device dedicated to storing MAC addresses for Ethernet, Wi-Fi, and Bluetooth. The following table lists the part number and manufacturer of the EEPROM device. Table : Part number and manufacturer of the EEPROM device
Reference designatorDeviceMPNManufacturerDescription
U20EEPROM93LC46B-I/SNMicrochip Technology Inc.1 Kbit low-voltage serial electrically erasable PROMs (EEPROM)

On-board sensors

The Dragonwing IQ-8275 EVK platform includes an on-board IMU and a temperature sensor. They are connected to the real-time subsystem (RTSS) domain of IQ-8275 EVK. Note Currently, the software doesn’t support the IMU and temperature sensors. Contact Qualcomm software team for details if you wish to enable them. The following table lists the part numbers and manufacturers of these sensors. Table : Part numbers and manufacturers of the sensors
Reference designatorSensor typeCommunication protocol usedMPNManufacturer
U97IMU sensorI2CICM-42688TDK InvenSense
U109Temperature sensorSPITMP411DQDGKRQ1Texas Instruments

PCIe interface

The target processor supports two PCIe interfaces: PCIe0 and PCIe1. PCIe0 is Gen4 2-lane and PCIe1 is Gen4 4-lane PCIe interface. Both PCIe interfaces are connected to an A/B switch, which by default, connects them to the expansion mezzanine. For DIP switch settings, see the Table: DIP switch position and its respective functions. The following figures show the PCIe interfaces and configuration. Figure : PCIe0 interfaces and configuration Figure : PCIe1 interfaces and configuration

Flash memory

The Dragonwing IQ-8275 EVK uses OSPI interface to support 2GBIT flash memory. The analog switch for OSPI interface allows the interface to be accessible through both the flash memory device and the B2B expansion connector (JEXP2). Note Due to the analog switch, you can connect the OSPI to the memory device or to B2B connector through DIP switch settings. For the intended OSPI settings, see the Table: DIP switch position and its respective functions. The following figure shows the flash memory interfaces and configuration. Figure : Flash memory interfaces and configuration The main board provides CAN0, and the JEXP1 connector provides CAN1-7. The following figures show controller area network (CAN) block diagram and interfaces. Figure : CAN0 interfaces

Expansion headers

The Dragonwing IQ-8275 EVK features four high-speed expansion connectors (JEXP1-4, 10139781-121422LF). Connect accessory cards such as GMSL mezzanine and RBx adapters to these connectors. Additionally, other interfaces mentioned throughout this document are also routed to these connectors, see the Connectors on Dragonwing IQ-8275 EVK. The following table details the pin mapping for the JEXP1 connector. Table : Pin mapping for the JEXP1 connector
Pin namePin numberPin numberPin name
GND611VREG_SYSTEM_PWR
DSI0_A0_LN0_P_CONN622VREG_SYSTEM_PWR
DSI0_B0_LN0_M_CONN633VREG_SYSTEM_PWR
GND644VREG_SYSTEM_PWR
DSI0_C0_LN1_P_CONN655VREG_SYSTEM_PWR
DSI0_A1_LN1_M_CONN666GND
GND677GND
DSI0_B1_CLK_P_CONN688GND
DSI0_C1_CLK_M_CONN699GND
GND7010VREG_PMIC_IN_3P3
DSI0_A2_LN2_P_CONN7111VREG_PMIC_IN_3P3
DSI0_B2_LN2_M_CONN7212GND
GND7313GND
DSI0_C2_LN3_P_CONN7414PME_GPIO_3_USB1_FAULT_3P3_N
DSI0_NC_LN3_M_CONN7515PME_GPIO_4_USB0_FAULT_3P3_N
GND7616MD_GPIO_17_MDPX3_1P8
VREG_L6C_SENSOR_IO_1P87717MD_GPIO_18_MDPX3_1P8
GND7818SGMII0_MDC_MDPX3_1P8
VREG_MDPX3_1P87919SGMII0_MDIO_MDPX3_1P8
GND8020SGMII0_CONN_RX_P
IOEXPAN1_INT_MDPX3_1P8_N8121SGMII0_CONN_RX_M
IOEXP5_IO_P2_1P88222SGMII0_CONN_TX_P
Not connected8323SGMII0_CONN_TX_M
Not connected8424SGMII0_INT_MDPX3_1P8_N
Not connected8525SGMII0_RST_MDPX3_1P8_N
Not connected8626JEXP1_MD_GPIO_45_MDPX3_1P8
IOEXP5_IO_P7_1P88727JEXP1_MD_GPIO_46_MDPX3_1P8
Not connected8828JEXP1_MD_GPIO_47_MDPX3_1P8
RTSS_ERR0_SPX3_1P88929JEXP1_MD_GPIO_48_MDPX3_1P8
RTSS_CAN_SPI_MISO_SPX3_1P89030RTSS_CAN0_TX_SPX3_1P8
RTSS_SPI_MISO_SPX3_1P89131RTSS_CAN0_RX_SPX3_1P8
RTSS_CAN_SPI_MOSI_SPX3_1P89232RTSS_CAN1_TX_SPX3_1P8
RTSS_CAN_SPI_SCLK_SPX3_1P89333RTSS_CAN1_RX_SPX3_1P8
RTSS_CAN_SPI_CS_0_SPX3_1P89434RTSS_CAN2_TX_SPX3_1P8
RTSS_CAN_SPI_CS_1_SPX3_1P89535RTSS_CAN2_RX_SPX3_1P8
RTSS_IO_47_SPX3_1P89636RTSS_CAN3_TX_SPX3_1P8
RTSS_IO_48_SPX3_1P89737RTSS_CAN3_RX_SPX3_1P8
RTSS_IO_49_SPX3_1P89838Not connected
RTSS_IO_50_SPX3_1P89939Not connected
RTSS_PMIC_INT_SPX3_1P8_N10040Not connected
RTSS_INT_SPX3_1P8_N10141Not connected
RTSS_PWR_READY_SPX3_1P810242Not connected
RTSS_SLP_EN_SPX3_1P810343Not connected
RTSS_DBG_UART_TX_M_SPX3_1P810444Not connected
RTSS_DBG_UART_RX_M_SPX3_1P810545Not connected
GND10646RTSS_CAN_INT0_SPX3_1P8
PCIE0_MEZZCONN_CLK_P10747Not connected
PCIE0_MEZZCONN_CLK_N10848RTSS_CAN_STB_0_SPX3_1P8
GND10949Not connected
PCIE0_MEZZCONN_RX0_P11050Not connected
PCIE0_MEZZCONN_RX0_N11151Not connected
GND11252RTSS_IO_2_SPX3_1P8
PCIE0_MEZZCONN_RX1_P11353RTSS_IO_3_SPX3_1P8
PCIE0_MEZZCONN_RX1_N11454Not connected
GND11555PCIE0_MEZZCONN_RST_1P8_N
PCIE0_MEZZCONN_TX0_P11656PCIE0_MEZZCONN_CLKREQ_1P8_N
PCIE0_MEZZCONN_TX0_N11757PCIE0_MEZZCONN_WAKE_1P8_N
GND11858MD_GPIO_78_GNSS_RESET_MDPX3_1P8
PCIE0_MEZZCONN_TX1_P11959MD_GPIO_77_GNSS_EN_MDPX3_1P8
PCIE0_MEZZCONN_TX1_N12060MD_GPIO_79_GNSS_BOOT_MODE_MDPX3_1P8
The following table details the pin mapping for the JEXP2 connector. Table : Pin mapping for the JEXP2 connector
Pin namePin numberPin numberPin name
VREG_MDPX3_1P8611VREG_SPX3_1P8
GND622GND
SOC_MI2S_MCLK0_MDPX3_1P8633VREG_SPX3_1P8
SOC_MI2S1_SCK_MDPX3_1P8644GND
SOC_MI2S1_WS_MDPX3_1P8655USB01_I2C_SDA_MDPX3_1P8
SOC_MI2S1_DATA0_MDPX3_1P8666USB01_I2C_SCL_MDPX3_1P8
SOC_MI2S1_DATA1_MDPX3_1P8677IOEXP5_IO_P1_1P8
MI2S2_SCK_MDPX3_1P8688VREG_1P2_EN
MI2S2_WS_MDPX3_1P8699USB_VBUS_DET_MDPX3_1P8
MI2S2_DATA0_MDPX3_1P87010USB_RESET_MDPX3_1P8_N
MI2S2_DATA1_MDPX3_1P87111USB1_ID_MDPX3_1P8
HS0_MI2S_SCK_CONN7212USB0_ID_MDPX3_1P8
HS0_MI2S_WS_CONN7313IOEXP5_IO_P0_1P8
HS0_MI2S_DATA0_CONN7414IOEXP5_IO_P3_1P8
HS0_MI2S_DATA1_CONN7515USB1_INT_MDPX3_1P8_N
HS1_MI2S_SCK_CONN7616USB0_INT_MDPX3_1P8_N
HS1_MI2S_WS_CONN7717MD_GPIO_65_MDPX3_1P8
HS1_MI2S_DATA0_CONN7818EXP_I2C_SDA_MDPX3_1P8
HS1_MI2S_DATA1_CONN7919EXP_I2C_SCL_MDPX3_1P8
HS2_MI2S_SCK_CONN8020FAN_INT_MDPX3_1P8_N
HS2_MI2S_WS_CONN8121HUB_P2_USB_HS_P
HS2_MI2S_DATA0_CONN8222HUB_P2_USB_HS_M
HS2_MI2S_DATA1_CONN8323HUB_P2_USB_SS_RX_P
SOC_QUA_MI2S_SCK_MDPX3_1P88424HUB_P2_USB_SS_RX_M
SOC_QUA_MI2S_WS_MDPX3_1P88525HUB_P2_USB_SS_TX_P
SOC_QUA_MI2S_DATA0_MDPX3_1P88626HUB_P2_USB_SS_TX_M
SOC_QUA_MI2S_DATA1_MDPX3_1P88727GND
SOC_QUA_MI2S_DATA2_MDPX3_1P88828HUB_P3_USB_HS_M
SOC_QUA_MI2S_DATA3_MDPX3_1P88929HUB_P3_USB_HS_P
SOC_I2S1_SCK_MDPX3_1P89030HUB_P3_USB_SS_TX_P
SOC_I2S1_WS_MDPX3_1P89131HUB_P3_USB_SS_TX_M
SOC_I2S1_DATA0_MDPX3_1P89232HUB_P3_USB_SS_RX_P
SOC_I2S1_DATA1_MDPX3_1P89333HUB_P3_USB_SS_RX_M
LPI_I2S2_CLK_MDPX3_1P89434GND
LPI_I2S2_WS_MDPX3_1P89535HUB_P4_USB_HS_M_2
LPI_I2S2_DATA0_MDPX3_1P89636HUB_P4_USB_HS_P_2
LPI_I2S2_DATA1_MDPX3_1P89737HUB_P4_USB_SS_TX_P
SOC_I2S3_SCK_MDPX3_1P89838HUB_P4_USB_SS_TX_M
SOC_I2S3_WS_MDPX3_1P89939HUB_P4_USB_SS_RX_P
SOC_I2S3_DATA0_MDPX3_1P810040HUB_P4_USB_SS_RX_M
SOC_I2S3_DATA1_MDPX3_1P810141GND
I2S4_SCK_MDPX3_1P810242RTSS_RGMII_RESET_SPX3_N
I2S4_WS_MDPX3_1P810343RTSS_RGMII_INT_SPX3_N
I2S4_DATA0_MDPX3_1P810444RTSS_RGMII_MDIO_SPX3
I2S4_DATA1_MDPX3_1P810545RTSS_RGMII_MDC_SPX3
RTSS_CONN_OSPI0_CS0_SPX3_1P8_N10646RTSS_RGMII_RX_CTL_SPX3
RTSS_CONN_OSPI0_DQS_SPX3_1P810747RTSS_RGMII_RXC_SPX3
RTSS_CONN_OSPI0_WR_SPX3_1P8_N10848RTSS_RGMII_RXD0_SPX3
RTSS_CONN_OSPI0_CLK_SPX3_1P810949RTSS_RGMII_RXD1_SPX3
RTSS_CONN_OSPI0_DATA_0_SPX3_1P811050RTSS_RGMII_RXD2_SPX3
RTSS_CONN_OSPI0_DATA_1_SPX3_1P811151RTSS_RGMII_RXD3_SPX3
RTSS_CONN_OSPI0_DATA_2_SPX3_1P811252RTSS_RGMII_TX_CTL_SPX3
RTSS_CONN_OSPI0_DATA_3_SPX3_1P811353RTSS_RGMII_TXC_SPX3
RTSS_CONN_OSPI0_DATA_4_SPX3_1P811454RTSS_RGMII_TXD0_SPX3
RTSS_CONN_OSPI0_DATA_5_SPX3_1P811555RTSS_RGMII_TXD1_SPX3
RTSS_CONN_OSPI0_DATA_6_SPX3_1P811656RTSS_RGMII_TXD2_SPX3
RTSS_CONN_OSPI0_DATA_7_SPX3_1P811757RTSS_RGMII_TXD3_SPX3
RTSS_RESOUT_SPX3_1P8_N11858GND
MD_GPIO_47_MDPX3_1P811959VREG_5P0
MD_GPIO_48_MDPX3_1P812060VREG_5P0
The following table details the pin mapping for the JEXP3 connector. Table : Pin mapping for the JEXP3 connector
Pin namePin numberPin numberPin name
MD_GPIO_25_MDPX3_1P8611EDP2_LN0_P
MD_GPIO_26_MDPX3_1P8622EDP2_LN0_M
MD_GPIO_27_MDPX3_1P8633GND
MD_GPIO_28_MDPX3_1P8644EDP2_LN1_P
MD_RESOUT_MDPX3_1P8_N655EDP2_LN1_M
MD_GPIO_54_WLAN_EN_1P8666GND
HST_SW_CTRL_MDPX3_1P8677EDP2_LN2_P
MD_GPIO_55_BT_EN_1P8688EDP2_LN2_M
BT0_UART_CTS_MDPX3_1P8699GND
BT0_UART_RFR_MDPX3_1P87010EDP2_LN3_P
BT0_UART_TX_MDPX3_1P87111EDP2_LN3_M
BT0_UART_RX_MDPX3_1P87212GND
MD_GPIO_10_MDPX3_1P87313EDP2_AUX_P
SDCARD_DET_MDPX3_1P8_N7414EDP2_AUX_M
BTLE_UART_TX_MDPX3_1P87515GND
BTLE_UART_RX_MDPX3_1P87616Not connected
Not connected7717Not connected
GND7818GND
Not connected7919Not connected
Not connected8020Not connected
GND8121GND
Not connected8222Not connected
Not connected8323Not connected
GND8424GND
Not connected8525Not connected
Not connected8626Not connected
GND8727GND
Not connected8828Not connected
Not connected8929Not connected
GND9030MDP_VSYNC_MDPX3_1P8
Not connected9131VREG_5P0_PGOOD
Not connected9232PG_VREG_3P3_SIP
GND9333EDP2_HPD_1P8
PMC_GPIO_4_IPA_PWR_EN_1P89434Not connected
WLAN_PWR_EN2_1P89535MD_GPIO_72_MDPX3_1P8
PMC_GPIO_6_WLAN_DBU4_EN_1P89636DISP_RST_MDPX3_1P8_N
Not connected9737DISP_INT_MDPX3_1P8_N
Not connected9838DES0_LOCK_1P8
IOEXP6_IO_P4_1P89939LCD_RESET_MDPX3_1P8
SENSOR_I2C_SDA_MDPX3_1P810040I2C_TO_SPI_MISO_1P8
SENSOR_I2C_SCL_MDPX3_1P810141I2C_TO_SPI_MOSI_1P8
TX3_DDC_SCL_1P810242I2C_TO_SPI_CLK_1P8
TX3_DDC_SDA_1P810343I2C_TO_SPI_CS0_1P8
AUDIO_PRI_SPI_MISO_MDPX3_1P810444MD_GPIO_41_MDPX3_1P8
AUDIO_PRI_SPI_MOSI_MDPX3_1P810545MD_GPIO_42_MDPX3_1P8
AUDIO_PRI_SPI_SCLK_MDPX3_1P810646USB0_VBUS_ON_MDPX3_1P8
AUDIO_PRI_SPI_CS_0_MDPX3_1P810747IOEXP3_IO_P2_1P8
AUDIO_PRI_SPI_CS_1_MDPX3_1P810848SENSOR_SLP_CLK_MDPX3_1P8
MD_GPIO_124_MDPX3_1P810949DISP_I2C_SDA_MDPX3_1P8
MD_GPIO_71_MDPX3_1P811050DISP_I2C_SCL_MDPX3_1P8
MD_DBG_UART_TX_MDPX3_1P811151MD_GPIO_80_MDPX3_1P8
MD_DBG_UART_RX_MDPX3_1P811252MD_GPIO_81_MDPX3_1P8
MD_GPIO_40_MDPX3_1P811353MD_GPIO_82_MDPX3_1P8
MD_GPIO_39_MDPX3_1P811454MD_GPIO_83_MDPX3_1P8
PMA_GPIO_02_POFF_COMPLETE_3P3_N11555JEXP3_MD_GPIO_49_MDPX3_1P8
PMA_GPIO_06_AOSS_SLP_ENT_3P311656JEXP3_MD_GPIO_50_MDPX3_1P8
VREG_WLAN_BT_CORE_VH_1P9511757JEXP3_MD_GPIO_51_MDPX3_1P8
VREG_WLAN_BT_CORE_VL_1P0511858JEXP3_MD_GPIO_52_MDPX3_1P8
VREG_WLAN_BT_CORE_VM_1P3511959CCI_TIMER3_MDPX3_1P8
USB1_VBUS_ON_MDPX3_1P812060MD_GPIO_64_MDPX3_1P8
The following table details the pin mapping for the JEXP4 connector. Table : Pin mapping for the JEXP4 connector
Pin namePin numberPin numberPin name
611SD_CARD_PWR_EN
Not connected622PCIE1_MEZZCONN_CLK_N
Not connected633PCIE1_MEZZCONN_CLK_P
Not connected644GND
Not connected655PCIE1_MEZZCONN_RX0_N
Not connected666PCIE1_MEZZCONN_RX0_P
Not connected677GND
Not connected688PCIE1_MEZZCONN_RX1_N
Not connected699PCIE1_MEZZCONN_RX1_P
Not connected7010GND
Not connected7111PCIE1_MEZZCONN_RX2_N
MD_GPIO_63_MDPX3_1P87212PCIE1_MEZZCONN_RX2_P
PCIE_SWITCH_PWR_EN_1P87313GND
IOEXP4_IO_P0_1P87414PCIE1_MEZZCONN_RX3_N
PCIE1_MEZZCONN_RST_1P8_N7515PCIE1_MEZZCONN_RX3_P
PCIE1_MEZZCONN_CLKREQ_1P8_N7616GND
PCIE1_MEZZCONN_WAKE_1P8_N7717PCIE1_MEZZCONN_TX0_N
IOEXP6_IO_P3_1P87818PCIE1_MEZZCONN_TX0_P
PMA_GPIO_09_USB2_ID7919GND
CCI4_I2C_SDA_MDPX3_1P88020PCIE1_MEZZCONN_TX1_N
CCI4_I2C_SCL_MDPX3_1P88121PCIE1_MEZZCONN_TX1_P
IOEXP6_IO_P2_1P88222GND
Not connected8323PCIE1_MEZZCONN_TX2_N
IOEXP6_IO_P1_1P88424PCIE1_MEZZCONN_TX2_P
Not connected8525GND
CAM2_PWR_EN_MDPX3_1P88626PCIE1_MEZZCONN_TX3_N
Not connected8727PCIE1_MEZZCONN_TX3_P
CCI4_I2C_SDA_MDPX3_1P88828GND
CCI4_I2C_SCL_MDPX3_1P88929Not connected
CAM2_MCLK_MDPX3_1P89030Not connected
CAM2_PWDN_MDPX3_1P89131Not connected
CAM2_STROBE_MDPX3_1P89232Not connected
CAM2_SPARE_GPIO_MDPX3_1P89333Not connected
CAM1_PWR_EN_MDPX3_1P89434Not connected
IOEXP5_IO_P4_1P89535Not connected
CCI2_I2C_SDA_MDPX3_1P89636Not connected
CCI2_I2C_SCL_MDPX3_1P89737Not connected
CAM1_MCLK_MDPX3_1P89838Not connected
RTSS_PMIC_I2C_SDA_SPX3_1P89939GND
CAM1_STROBE_MDPX3_1P810040CSI2_CONN_NC_CLK_P
CAM1_SPARE_GPIO_MDPX3_1P810141CSI2_CONN_A0_CLK_M
CAM0_PWR_EN_MDPX3_1P810242CSI2_CONN_B0_LN0_P
IOEXP5_IO_P5_1P810343CSI2_CONN_C0_LN0_M
CCI0_I2C_SDA_MDPX3_1P810444CSI2_CONN_A1_LN1_P
CCI0_I2C_SCL_MDPX3_1P810545CSI2_CONN_B1_LN1_M
CAM0_MCLK_MDPX3_1P810646CSI2_CONN_C1_LN2_P
RTSS_PMIC_I2C_SCL_SPX3_1P810747CSI2_CONN_A2_LN2_M
CAM0_STROBE_MDPX3_1P810848CSI2_CONN_B2_LN3_P
CAM0_SPARE_GPIO_MDPX3_1P810949CSI2_CONN_C2_LN3_M
GND11050GND
CSI0_CONN_NC_CLK_P11151CSI1_CONN_NC_CLK_P
CSI0_CONN_A0_CLK_M11252CSI1_CONN_A0_CLK_M
CSI0_CONN_B0_LN0_P11353CSI1_CONN_B0_LN0_P
CSI0_CONN_C0_LN0_M11454CSI1_CONN_C0_LN0_M
CSI0_CONN_A1_LN1_P11555CSI1_CONN_A1_LN1_P
CSI0_CONN_B1_LN1_M11656CSI1_CONN_B1_LN1_M
CSI0_CONN_C1_LN2_P11757CSI1_CONN_C1_LN2_P
CSI0_CONN_A2_LN2_M11858CSI1_CONN_A2_LN2_M
CSI0_CONN_B2_LN3_P11959CSI1_CONN_B2_LN3_P
CSI0_CONN_C2_LN3_M12060CSI1_CONN_C2_LN3_M

Debug interface

The platform includes a micro-USB connector receptacle (JTAC, part number: 0475890001) connected to an FTDI chip (U19, part number: FT4232HL-REEL), which is used for debugging purposes. For the location of the debug interface connector on the platform, see the Connectors on Dragonwing IQ-8275 EVK.

JTAG interface

The JTAG connector header on the board is a 20-position pin interconnect with a 0.050” (1.27 mm) pitch and 0.050” (1.27 mm) row spacing. The reference designator for the JTAG connector component is JTAG, and its part number is FTSH-110-01-L-D-RA-K. To use a traditional JTAG connector, an adapter such as the 65-PM339-1 may be required. For the location of the JTAG connectors on the platform, see the Connectors on Dragonwing IQ-8275 EVK.

Audio

For speaker and audio support, the HS0_MI2S interface is used for the two onboard audio amplifiers, and the HS2_MI2S interface is used for the I2S microphone on the mainboard. Both interfaces can optionally be switched to the mezzanine connectors for expansion purposes. Consider the following details about speakers and microphones on the device:
  • Speakers: Onboard speakers (with MAX98357 I2S-amps); HS0_MI2S is shared between both left and right speakers to enable stereo sound.
  • Microphones: The EVK includes a single onboard microphone (MMICT5848) that uses the HS2_MI2S interface. By default, the microphone is configured to the left channel.
The following figure shows the audio connections. Figure : Audio connections The following figure shows the Dragonwing IQ-8275 EVK connected to two mini speakers. Figure : Dragonwing IQ-8275 EVK connected to two mini speakers

Next steps