> ## Documentation Index
> Fetch the complete documentation index at: https://dragonwingdocs.qualcomm.com/llms.txt
> Use this file to discover all available pages before exploring further.
# Debug RTSS
After flashing the RTSS binaries, the boot logs and FreeRTOS logs are displayed on the screen. Debug RTSS using the boot logs and FreeRTOS logs.
## **Prerequisites**
[Set up debug UART](https://dragonwingdocs.qualcomm.com/Linux/devices/iq9075-evk/set-up-the-device#set-up-the-debug-uart).
>
> **Important**
>
> * To open the RTSS debug UART port on Linux, use the ttyUSB0 serial port.
> ```text theme={null}
> sudo screen /dev/ttyUSB0 115200
> ```
> * To open the RTSS debug UART port on Windows, use the first COM port, COM1.
>
## **RTSS boot logs**
The following sample logs indicate that the RTSS is booted up on the device:
```text theme={null}
SPBL start: 13933
SPBL Boot Media Detect Start: 14218
SPBL Boot Media Detect End: 15993
SPBL ELF MD Load Start: 16020
SPBL ELF MD Load End: 16126
SPBL ELF Auth Start: 16128
SPBL ELF Auth End: 16586
SPBL ELF Seg Load Start: 16588
SPBL ELF Seg Load End: 22256
SPBL ELF Seg Verify Start: 22260
SPBL ELF Seg Verify End: 24101
SPBL Exit: 24118
h0[ 0.030076s]KPI_MARKER: SAIL EL2 entry on core 0, Start time: 30075us
h0[ 0.030104s]SAIL BSP EL2 : IPCC Diagnostics passed from core 0
h0[ 0.030131s]SAIL image id: SAIL.SI.x.x-000xx-AU.LEMANS-1
h0[ 0.030151s]SAIL workspace name: XXXX_SAIL.SI.x.x-000xx-AU.LEMANS-1
h0[ 0.030177s]hostname: xx-xx-x
h0[ 0.030192s]SAIL build env timestamp: Mon Sep 8 04:31:51 PM +0530 2025
h0[ 0.030258s]KPI_MARKER: GPIO Init Started on core 0, Start time: 30257us
h0[ 0.030290s]KPI_MARKER: GPIO Init Done on core 0, Time taken: 32us
h0[ 0.032582s]CHIP VARIANT: CHIPINFO_ID_QCS_LEMANS_INDUSTRIAL
h0[ 0.032606s]KPI_MARKER: ISD Init Started on core 0, Start time: 32606us
h0[ 0.032661s]KPI_MARKER: ISD Init Done on core 0, Time taken: 55us
h1[ 0.037507s]KPI_MARKER: SAIL EL2 entry on core 1, Start time: 37507us
h1[ 0.037523s]SAIL BSP EL2 : IPCC Diagnostics passed from core 1
h2[ 0.037712s]KPI_MARKER: SAIL EL2 entry on core 2, Start time: 37712us
h2[ 0.037737s]SAIL BSP EL2 : IPCC Diagnostics passed from core 2
h0[ 0.106367s] Received MD TZ Interrupt: 0xCB000001
h0[ 0.106387s]XBL_SEC BOOT SUCCESS
h0[ 0.288410s]vCaptureDisableHBCU: SAIL BIST pass
h0[ 0.297051s]PMIC Driver Skipped, ChipId = 676
h0[ 0.310015s][SPINOR] Device ID = 0x3c84c2
h0[ 0.316505s][SPINOR] Device Memory density = 2048 Mb
h0[ 0.324137s]spinor_get_dlp_address:dlp partition address 0x6000 obtained
h0[ 0.332917s]configure_dummy_cycles: Info, 20 dummy cycles configured
h0[ 0.341379s][SPINOR] Mode of Operation: DDR_8_8_8
h0[ 0.348426s][SPINOR] Frequency of operation = 166 MHz
h0[ 0.355684s][SPINOR] Frequency of operation = 166 MHz
h0[ 0.363326s][SPINOR] Device block count = 65536
h0[ 0.370234s][SPINOR] Device pages per block = 16
h0[ 0.377213s][SPINOR] Device page size in bytes = 256
h0[ 0.386841s]xSAILUpdaterCoreInit: Primary GPT headerCRC = 0xe0cdcf82 partitionCRC = 0xdd44f8ee num_partitions=0x40
h0[ 0.398426s]xSAILUpdaterCoreInit: Secondary GPT headerCRC = 0xd6acac78 partitionCRC = 0xdd44f8ee num_partitions=0x40
h0[ 0.410241s]xSAILUpdaterGetLoaderFlow: OTA Bookkeeping is Enabled max retry count: 5 rollbackEn=1
h0[ 0.421292s]xSAILUpdaterGetLoaderFlow: ePrvCheckBookB isBookBFresh 0
h0[ 0.430792s]ePrvCheckBookRedundancy: numEntriesA:0x1, numValidEntriesA:0x1, isFreshPartA:0x0, isCorrputedA:0x0
h0[ 0.442098s]ePrvCheckBookRedundancy: numEntriesB:0x1, numValidEntriesB:0x1, isFreshPartB:0x0, isCorrputedB:0x0
h0[ 0.453647s]UpdOtaSts:PPartSts[7] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.461537s]UpdOtaSts:PPartSts[6] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.469426s]UpdOtaSts:PPartSts[5] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.477315s]UpdOtaSts:PPartSts[4] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.485204s]UpdOtaSts:PPartSts[3] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.493093s]UpdOtaSts:PPartSts[2] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.500982s]UpdOtaSts:PPartSts[1] Swap:0x1 state:0x7f CRC:0xff
h0[ 0.508870s]UpdOtaSts:PPartSts[0] Swap:0x0 state:0x4 CRC:0xfb
h0[ 0.516690s]xSAILUpdaterGetOtaStatus:return the state 0x4
h0[ 0.524226s]xSAILUpdaterGetLoaderFlow: xOtaStatus=4 guidMap=0
h0[ 0.532356s]xSAILUpdaterGetLoaderFlow: xSAILUpdaterGetMagicNum bValid 1, ulMagicNum = 0x1
h0[ 0.543315s]xSAILUpdaterGetLoaderFlow: prim partition_entries_crc32 0xdd44f8ee primHdrCrcStatus = 1 primEntryCrcStatus = 1
h0[ 0.555910s]xSAILUpdaterSetOtaStatus:Values at last index[0] -> last_raw_state=0x4 last_state=0x4 last_guidMap=0x0 last_CRC=0xfb
h0[ 0.568476s]xSAILUpdaterSetOtaStatus:last state is the same as new state No need to Write
h0[ 0.578334s]sailhyp_xbl_init: SAIL HYP XBL Info. currentOTAState = 4, GPT_ID = 1, Partition_ID = 1
h0[ 0.588739s]SAIL Secure Boot: Off
h0[ 0.596509s]SAILSS crash debug init completed
h0[ 0.665922s]sailhyp_xbl_boot_elfs: mutex lock, coreId = 0
h0[ 0.698153s]sailhyp_xbl_get_image_entry_point: core_id = 0, image_id = 0, image_entry = 0x811b680
h1[ 0.698187s]image_entry for core1:135378560
2[ 0.698187s]image_entry for core2:135378560
0[ 0.698189s]KPI_MARKER: SAIL EL2 Exit on core 0, Time taken: 668112us
2[ 0.698208s]KPI_MARKER: SAIL EL2 Exit on core 2, Time taken: 660496us
h1[ 0.698208s]KPI_MARKER: SAIL EL2 Exit on core 1, Time taken: 660700us
c0[ 0.700949s]Entered EL1, Core:0
```
**RTSS FreeRTOS logs**
The following sample logs indicate that the FreeRTOS is initialized on the device:
```text theme={null}
c2[ 0.701105s]FreeRTOS Initialized Successfully
c1[ 0.702020s]Spi_SetupEB : 369 END
0[ 0.702020s]vSAILAPPLShelltask Task created
c0[ 0.702042s][ UART test framework] Semaphore GIVE success
c0[ 0.702077s] [core 0] sleepInit task created
c0[ 0.702173s]uxCoreAffinityMask value 1 -:2 xSchdCore-:1
c0[ 0.702201s]New Task 1 created
c0[ 0.702220s] [core 1] sleepInit task created
c0[ 0.702238s]***xCanTrcvTaskInit*******
c0[ 0.702257s]xCanTrcvTaskInit <– xResult=1
c0[ 0.702277s]***xCanTaskInit*******
c0[ 0.702303s]xCanTaskInit: xSleepRegisterCallBack Reg success
c0[ 0.702325s]xCanTaskInit <– xResult=1
c0[ 0.702344s]***xCanSrvTaskInit*******
c0[ 0.702362s]xCanSrvTaskInit <– xResult=1
c0[ 0.702382s]***xCanMailboxTaskInit*******
c0[ 0.702402s]xCanMailboxTaskInit <– xResult=1
c0[ 0.702430s][ SPI drv] SPI Callback Binary Semaphore Creation Success
c0[ 0.702466s]New Task 2 created
c0[ 0.702485s] [core 2] sleepInit task created
c0[ 0.702528s]Rx MD ISD event capture : 0xCB000001
c0[ 0.702548s]XBL_SEC BOOT SUCCESS
c0[ 0.702561s]FreeRTOS Initialized Successfully
c1[ 0.703116s]Spi_SetupEB : 369 END
c1[ 0.706383s]FreeRTOS Initialized Successfully
c2[ 0.706782s][SLEEP ====> ]:vSleepTask started in core 2
c0[ 0.706796s][SLEEP ====> ]:vSleepTask started in core 0
c1[ 0.707137s][SLEEP ====> ]:vSleepTask started in core 1
c1[ 0.707646s]vSAILAPPLShelltask_core1 task running on core 1
c0[ 0.709215s]xSAILUpdaterCoreInit: Primary GPT headerCRC = 0xe0cdcf82 partitionCRC = 0xdd44f8ee num_partitions=0x40
c0[ 0.709279s]xSAILUpdaterCoreInit: Secondary GPT headerCRC = 0xd6acac78 partitionCRC = 0xdd44f8ee num_partitions=0x40
c2[ 0.709459s]vSAILAPPLShelltask_core2 task running on core 2
c0[ 0.710113s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[7].logicGuidASwapped: 0x1 otaState[7].state: 0x7f CRC -> otaState[7].crc: 0xff
c0[ 0.710197s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[6].logicGuidASwapped: 0x1 otaState[6].state: 0x7f CRC -> otaState[6].crc: 0xff
c0[ 0.710313s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[5].logicGuidASwapped: 0x1 otaState[5].state: 0x7f CRC -> otaState[5].crc: 0xff
c0[ 0.710441s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[4].logicGuidASwapped: 0x1 otaState[4].state: 0x7f CRC -> otaState[4].crc: 0xff
c0[ 0.710568s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[3].logicGuidASwapped: 0x1 otaState[3].state: 0x7f CRC -> otaState[3].crc: 0xff
c0[ 0.710712s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[2].logicGuidASwapped: 0x1 otaState[2].state: 0x7f CRC -> otaState[2].crc: 0xff
c0[ 0.710849s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[1].logicGuidASwapped: 0x1 otaState[1].state: 0x7f CRC -> otaState[1].crc: 0xff
c0[ 0.710976s]xSAILUpdaterGetOtaStatus: Primary Partition Status -> otaState[0].logicGuidASwapped: 0x0 otaState[0].state: 0x4 CRC -> otaState[0].crc: 0xfb
c0[ 0.711104s]xSAILUpdaterGetOtaStatus:return the state 0x4
c2[ 0.713909s]PSAIL PinBIST Pass!!
c0[ 0.908953s]Rx MD Interrupt : 0xCC010000
c0[ 0.908971s]DDR READY
c0[ 1.291929s]Rx MD Interrupt : 0xCB000003
c0[ 1.291947s]XBL_LDR BOOT SUCCESS
c0[ 1.356263s] Rx MD TZ Interrupt: 0xCB000007
c0[ 1.356282s]TZ BOOT SUCCESS
c0[ 1.518747s]Rx MD Interrupt : 0xCB00000F
c0[ 1.518765s]QHEE BOOT SUCCESS
c0[ 3.217084s] Rx MD TZ Interrupt: 0xCD0A0000
c0[ 3.217106s]SAIL SDI Disabled
c0[ 3.217118s]Ack to MD : 0xAA0C0000
```
## **Parse RTSS RAM dump logs using QCAP**
The Qualcomm Crash Analysis Portal (QCAP) tool is used to parse RTSS RAM dump. For information about how to parse the RTSS dumps using QCAP, see [Parse RAM dumps using RAMParser](https://dragonwingdocs.qualcomm.com/System/Debug-Subsystem/parse-ram-dumps-using-ram-parser).
## **Next steps**
* [RTSS test commands](RTSS-test-commands)