> ## Documentation Index
> Fetch the complete documentation index at: https://dragonwingdocs.qualcomm.com/llms.txt
> Use this file to discover all available pages before exploring further.

# LPDDR Memory

The Qualcomm Dragonwing IQ-9075 features an advanced memory subsystem designed for high-performance computing applications.

## Specifications

| Specification       | Details                        |
| ------------------- | ------------------------------ |
| **Memory Type**     | LPDDR5X / LPDDR5 SDRAM         |
| **Configuration**   | Six-channel non-PoP            |
| **Maximum Density** | 36 GB                          |
| **Clock Speed**     | Up to 3200 MHz                 |
| **Data Width**      | 6 × 16-bit (96-bit total)      |
| **Standards**       | JEDEC LPDDR5X/LPDDR5 compliant |

## Architecture

The IQ-9075 memory controller supports high-bandwidth, low-latency operations across six independent 16-bit channels with dynamic frequency scaling for power optimization.

The IQ-9075M module has three 12 GB LPDDR5 SDRAM ICs:

<img src="https://mintcdn.com/qualcomm-prod/tRWO8v_Df_ujnDuD/Ubuntu/images/peripheral-interfaces/IQ9075-LPDDR_memory.png?fit=max&auto=format&n=tRWO8v_Df_ujnDuD&q=85&s=dfae5f18412450b5c7fbc7a763f2ec1f" width="598" height="589" data-path="Ubuntu/images/peripheral-interfaces/IQ9075-LPDDR_memory.png" />

<img src="https://mintcdn.com/qualcomm-prod/P0rmO3AZfXx7cgqQ/Ubuntu/images/peripheral-interfaces/memory_channel_arch.png?fit=max&auto=format&n=P0rmO3AZfXx7cgqQ&q=85&s=68fd6c951917a43aa4ad8262e838e055" width="1193" height="741" data-path="Ubuntu/images/peripheral-interfaces/memory_channel_arch.png" />

### Supported DRAM Components

All DRAM components must be selected from the Qualcomm Preferred Vendor List (PVL).

<Steps>
  <Step title="Access the PVL database">
    Navigate to the [Qualcomm PVL](https://www.qualcomm.com/preferred-vendor-list) and sign in with your Qualcomm account.
  </Step>

  <Step title="Download the PVL file">
    Download the **QRD Hardware - Preferred Vendor List (PVL)** Excel file.
  </Step>

  <Step title="Filter for IQ-9075 memory">
    Filter by **Type: Memory** and **Chipset: IQ-9075**.

    <img src="https://mintcdn.com/qualcomm-prod/P0rmO3AZfXx7cgqQ/Ubuntu/images/peripheral-interfaces/pvl_list.png?fit=max&auto=format&n=P0rmO3AZfXx7cgqQ&q=85&s=79b3caeda3d1c26d0c06e5caa3753ba4" width="1115" height="657" data-path="Ubuntu/images/peripheral-interfaces/pvl_list.png" />
  </Step>
</Steps>

## Initialization

<img src="https://mintcdn.com/qualcomm-prod/P0rmO3AZfXx7cgqQ/Ubuntu/images/peripheral-interfaces/memory_initilizatoin_diagram.png?fit=max&auto=format&n=P0rmO3AZfXx7cgqQ&q=85&s=e1bf916ede433999396fec940d4d50e4" width="1602" height="305" data-path="Ubuntu/images/peripheral-interfaces/memory_initilizatoin_diagram.png" />

<img src="https://mintcdn.com/qualcomm-prod/P0rmO3AZfXx7cgqQ/Ubuntu/images/peripheral-interfaces/ddr_initialization_sequence.png?fit=max&auto=format&n=P0rmO3AZfXx7cgqQ&q=85&s=3ed32d95040a9c4dcf2876584a0f8afa" width="935" height="895" data-path="Ubuntu/images/peripheral-interfaces/ddr_initialization_sequence.png" />

<img src="https://mintcdn.com/qualcomm-prod/P0rmO3AZfXx7cgqQ/Ubuntu/images/peripheral-interfaces/Memory_access_flow_diagram.png?fit=max&auto=format&n=P0rmO3AZfXx7cgqQ&q=85&s=e0f371029940104e327c711869cdcae6" width="1609" height="645" data-path="Ubuntu/images/peripheral-interfaces/Memory_access_flow_diagram.png" />

<img src="https://mintcdn.com/qualcomm-prod/P0rmO3AZfXx7cgqQ/Ubuntu/images/peripheral-interfaces/memory_access_sequence.png?fit=max&auto=format&n=P0rmO3AZfXx7cgqQ&q=85&s=b4c7cd4057a93baaecc68050f91296b7" width="1038" height="934" data-path="Ubuntu/images/peripheral-interfaces/memory_access_sequence.png" />

## Setup and Configuration

### Prerequisites

* IQ-9075 development board with PVL-compliant LPDDR5X or LPDDR5 DRAM
* Canonical Ubuntu software package
* XBL bootloader with DSF (DDR System Firmware)
* UART debug cable and SSH access

### Initial Setup

<Steps>
  <Step title="Verify DRAM component">
    Confirm your DRAM part number is listed in the Qualcomm PVL for IQ-9075.
  </Step>

  <Step title="Flash the software package">
    ```bash theme={null}
    fastboot flash xbl xbl.elf
    fastboot flashall
    ```
  </Step>

  <Step title="Boot and verify detection">
    Connect UART console (115200 baud, 8N1) and watch for initialization messages:

    * `sbl1_ddr_init, Start`
    * `LP5 DDR detected`
    * `Manufacturer ID = XXXX, Device Type = XXXX`
    * `Rank 0 size = XXXX MB, Rank 1 size = XXXX MB`
    * `Max enabled DDR Freq = 3200 MHz`
  </Step>
</Steps>

### Frequency Scaling

```bash theme={null}
# Check current DRAM frequency
cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/cur_freq

# List available frequencies
cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/available_frequencies

# Set specific frequency (requires root)
echo <frequency> > /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/userspace/set_freq
```

### Memory Bandwidth Monitoring

```bash theme={null}
cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/cur_freq
cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/load
cat /proc/meminfo
```

## Debugging

### Boot Log Analysis

| Log Entry                           | Description                | Action if Missing                   |
| ----------------------------------- | -------------------------- | ----------------------------------- |
| `sbl1_ddr_init, Start`              | DRAM initialization begins | Check XBL image integrity           |
| `<LP5> DDR detected`                | DRAM type detected         | Verify DRAM component compatibility |
| `Manufacturer ID = <XXXX>`          | DRAM identification        | Cross-reference with PVL            |
| `Rank 0 size = <XXXX> MB`           | Density detection          | Check DRAM module installation      |
| `Max enabled DDR Freq = <XXXX> MHz` | Maximum frequency          | Verify frequency configuration      |
| `DDR Frequency, <XXXX> MHz`         | Operating frequency set    | Verify frequency matches spec       |

```bash theme={null}
# Search boot log for DRAM entries
grep -i "ddr\|dram\|memory" boot.log

# Check for errors
grep -i "error\|fail\|panic" boot.log
```

### Diagnostic Commands

```bash theme={null}
# Check DRAM detection in boot logs
dmesg | grep -i ddr
dmesg | grep -i memory

# Display memory information
cat /proc/meminfo

# Verify operating frequency
cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/cur_freq

# Check kernel memory map
cat /proc/iomem | grep -i memory

# Check for ECC errors
dmesg | grep -i ecc
cat /sys/devices/system/edac/mc/mc*/ce_count
cat /sys/devices/system/edac/mc/mc*/ue_count
```

## Troubleshooting

<AccordionGroup>
  <Accordion title="DRAM Not Detected at Boot">
    **Symptoms:** No DRAM detection in UART logs; boot hangs at XBL stage.

    **Steps:**

    * Verify DRAM modules are properly seated with no physical damage
    * Measure VDD and VDDQ voltages — ensure they meet JEDEC specifications
    * Check for voltage droops during boot
    * Verify clock signal presence and data line connectivity

    **Resolution:** Reseat DRAM modules, fix power supply issues, or contact Qualcomm support.
  </Accordion>

  <Accordion title="Wrong DRAM Type Detected">
    **Symptoms:** Detected type doesn't match installed component; incorrect manufacturer ID; wrong memory size.

    **Steps:**

    * Check log for `Manufacturer ID = <XXXX>, Device Type = <XXXX>`
    * Verify DRAM part number against PVL
    * Inspect physical markings on DRAM chips

    **Resolution:** Replace with PVL-approved component; verify procurement source for authenticity.
  </Accordion>

  <Accordion title="DRAM Initialization Fails">
    **Symptoms:** Boot hangs after DRAM detection; training/calibration failures; intermittent boot failures.

    **Steps:**

    * Check temperature (must be within spec) and voltage stability
    * Measure signal quality on all channels; verify impedance matching
    * Try booting at a lower frequency — success indicates signal integrity issue

    **Resolution:** Improve signal integrity (routing, termination); adjust timing parameters (contact Qualcomm).
  </Accordion>

  <Accordion title="Memory Corruption During Runtime">
    **Symptoms:** Random application crashes, kernel panics, data corruption.

    **Steps:**

    ```bash theme={null}
    # Monitor for errors
    dmesg -w | grep -i "corruption\|error"

    # Check DRAM temperature
    cat /sys/class/thermal/thermal_zone*/temp
    ```

    **Resolution:** Improve thermal management, fix power supply issues, replace failing DRAM modules.
  </Accordion>

  <Accordion title="Performance Below Specification">
    **Symptoms:** Memory bandwidth lower than expected; high latency; system performance degradation.

    **Steps:**

    ```bash theme={null}
    # Check current frequency (should be up to 3200 MHz)
    cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/cur_freq

    # Check governor and throttling
    cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/governor
    cat /sys/class/thermal/thermal_zone*/temp
    ```

    **Resolution:** Set performance governor, improve cooling, verify DRAM component supports full speed.
  </Accordion>

  <Accordion title="Insufficient Memory Available">
    **Symptoms:** Less memory than installed; out-of-memory errors; allocation failures.

    **Steps:**

    ```bash theme={null}
    # Check total memory (should show up to 36 GB)
    cat /proc/meminfo | grep MemTotal

    # Check reserved regions
    cat /proc/iomem | grep -i reserved

    # Identify memory consumers
    ps aux --sort=-%mem | head -20
    ```

    **Resolution:** Verify all DRAM modules are detected; review reserved memory configuration; fix memory leaks.
  </Accordion>
</AccordionGroup>

## Performance Optimization

### Frequency Governor

```bash theme={null}
# Maximum performance
echo performance > /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/governor

# Power-optimized
echo ondemand > /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/governor

# Manual frequency
echo userspace > /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/governor
echo 3200000000 > /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/userspace/set_freq
```

### Cache and Access Patterns

```bash theme={null}
# Check cache configuration
cat /sys/devices/system/cpu/cpu*/cache/index*/size
cat /sys/devices/system/cpu/cpu*/cache/index*/type
```

Best practices:

* Prefer sequential over random memory access
* Align data structures to cache line boundaries
* Pre-allocate memory when possible to minimize allocation overhead
* Use huge pages for large allocations

### Monitoring

```bash theme={null}
# Real-time memory usage
watch -n 1 free -h

# Bandwidth load
cat /sys/class/devfreq/soc:qcom,cpu-llcc-ddr-bw/load

# Cache miss profiling
perf stat -e cache-misses,cache-references <application>
```

## Resources

| Resource                 | URL                                                                                                                                                                                        |
| ------------------------ | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ |
| JEDEC LPDDR Standards    | [https://www.jedec.org/category/technology-focus-area/mobile-memory-lpddr-wide-io-memory-mcp](https://www.jedec.org/category/technology-focus-area/mobile-memory-lpddr-wide-io-memory-mcp) |
| Qualcomm PVL             | [https://www.qualcomm.com/preferred-vendor-list](https://www.qualcomm.com/preferred-vendor-list)                                                                                           |
| Qualcomm Software Center | [https://softwarecenter.qualcomm.com/#/](https://softwarecenter.qualcomm.com/#/)                                                                                                           |