> ## Documentation Index
> Fetch the complete documentation index at: https://dragonwingdocs.qualcomm.com/llms.txt
> Use this file to discover all available pages before exploring further.
# PCIe
PCIe (Peripheral Component Interconnect Express) uses a bidirectional connection to send and receive information simultaneously. The path between devices is called a **Link**, made up of one or more transmit/receive pairs called **Lanes**.
## Hardware Specifications
### IQ-9075 PCIe Controllers
| Parameter | PCIe RC1 | PCIe RC0 |
| ----------------------- | ------------------------------------------------------------------------ | ------------------------------------------------------------------------ |
| **Speed** | Gen4 2-lane (8 GT/s) | Gen4 4-lane (8 GT/s) |
| **Configuration Space** | 0x40100000 (1 MB) | 0x60100000 (1 MB) |
| **I/O Space** | 0x40200000 (1 MB) | 0x60200000 (1 MB) |
| **BAR Space** | 0x40300000 (509 MB) | 0x60300000 (509 MB) |
| **Power Rails** | vreg\_l5a (VDD\_A\_PCIE\_0\_CORE), vreg\_l1c (VDD\_A\_PCIE\_0\_PLL\_1P2) | vreg\_l5a (VDD\_A\_PCIE\_1\_CORE), vreg\_l1c (VDD\_A\_PCIE\_1\_PLL\_1P2) |
| **Interrupts** | MSI and PCI legacy | MSI and PCI legacy |
| **Power Management** | ASPM (L1/L1ss, L0s) | ASPM (L1/L1ss, L0s) |
### EVK Hardware Configuration
* **PCIe0**: Gen4 2-lane — M.2 E key (Wi-Fi) or expansion (switch-selectable via SW1-1)
* **PCIe1**: Gen4 4-lane — PCIe x4 slot or expansion (switch-selectable via SW1-2)
* **JPCIE**: PCIe Express v4 receptacle connector (PCIe1)
## Architecture
| Layer | Key Features |
| --------------- | ----------------------------------------------------- |
| **Physical** | Link training, 8b/10b encoding, serial conversion |
| **Data Link** | DLLP assembly, LCRC generation, ACK/NAK replay |
| **Transaction** | TLP assembly, ECRC, flow control, QoS (TC→VC mapping) |
### PCIe Connection Types
| Type | Description |
| --------------------- | ---------------------------------------- |
| **Root Complex (RC)** | Connects CPU to PCIe topology |
| **Switch** | Routes packets between more than 2 ports |
| **Bridge** | Connects different buses |
| **Endpoint (EP)** | Leaf device with only an upstream port |
## Software Driver Configuration
### Kernel Configuration
```
CONFIG_HOTPLUG_PCI=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCIE_DW_PLAT_HOST=y
CONFIG_PCIE_QCOM=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_POWER_SUPERSAVE=y
CONFIG_BLK_DEV_NVME=y
CONFIG_NVME_CORE=y
```
### Device Tree Sources
| Platform | File |
| ------------------ | --------------------------------------- |
| Dragonwing IQ-9075 | `arch/arm64/boot/dts/qcom/sa8775p.dtsi` |
### Key Driver Files
| Component | Path |
| --------------- | --------------------------------------------------- |
| PCIe Driver | `drivers/pci/controller/dwc/pcie-qcom.c` |
| DesignWare Host | `drivers/pci/controller/dwc/pcie-designware-host.c` |
| PHY Driver | `drivers/phy/qualcomm/phy-qcom-qmp-pcie.c` |
## Verification
### List PCIe Devices
```bash theme={null}
lspci
```
**Example output:**
```
0001:00:00.0 PCI bridge: Qualcomm Device 010b
0001:01:00.0 PCI bridge: Toshiba Corporation Device 0623
0001:05:00.0 Ethernet controller: Toshiba Corporation Device 0220
```
### Check Link Status
```bash theme={null}
lspci -vv | grep -i "lnk"
cat /sys/bus/pci/devices/*/current_link_speed
cat /sys/bus/pci/devices/*/current_link_width
```
### USB over PCIe
After connecting a USB-over-PCIe card:
```bash theme={null}
lspci
# Expected: USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller
lsusb
# Shows connected USB devices
```
### NVMe over PCIe
```bash theme={null}
lspci | grep -i nvme
ls /dev/nvme*
nvme list
```
## Debugging
### Enable Debug Logs
```bash theme={null}
sudo su
echo 8 > /proc/sys/kernel/printk
echo "file pcie-qcom.c +p" > /sys/kernel/debug/dynamic_debug/control
echo "file pcie-designware-host.c +p" > /sys/kernel/debug/dynamic_debug/control
dmesg | grep -i pcie
```
## Troubleshooting
**Possible causes:** PHY not initialized, clock/power issues, incorrect device tree.
```bash theme={null}
dmesg | grep -i phy | grep -i pcie
cat /sys/kernel/debug/regulator/regulator_summary | grep -i pcie
```
* Check PHY power rails and clock configuration
* Verify device tree settings
**Possible causes:** Link not established, endpoint not powered, switch misconfigured.
```bash theme={null}
lspci -tv
dmesg | grep -i pcie
```
* Verify DIP switch positions (SW1-1, SW1-2)
* Check endpoint power supply
* Enable MSI in device tree
* Check interrupt controller configuration
* Verify `pci_enable_msi()` returns success in driver
```bash theme={null}
lspci -vv | grep -i "lnk"
# Check Speed and Width fields
```
* Verify link is running at expected Gen4 speed
* Adjust ASPM settings if too aggressive
## Quick Reference
### Essential Commands
```bash theme={null}
lspci # List all PCIe devices
lspci -vv # Detailed device info
lspci -tv # Tree view
lspci -nn # With numeric IDs
dmesg | grep -i pcie # Kernel messages
cat /sys/bus/pci/devices/*/current_link_speed # Link speeds
cat /sys/bus/pci/devices/*/current_link_width # Link widths
```
## Resources
* [Kernel PCIe Documentation](https://www.kernel.org/doc/html/latest/PCI/index.html)
* [PCIe Specification](https://pcisig.com/specifications/pciexpress/technical_library/pciexpress_whitepaper.pdf)
* [Device Tree Bindings](https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pci/qcom%2Cpcie-sc8280xp.yaml)
* [Qualcomm PCIe Driver](https://github.com/torvalds/linux/blob/master/drivers/pci/controller/dwc/pcie-qcom.c)