Figure: DPU architecture
- Image processing includes the following:
- Composition: blends individual layers into a single frame and sends it to the display panel
- Scaling: supports upscale and downscale of the source image to match the panel resolution
- Color format conversion: converts colors from one color format to another (from YUV to RGB)
- Color space conversion: converts colors from one color space to another (sRGB, P3, and BT2020)
- Color processing: enhances the colors for better visual quality
- Interfaces: Connects with various panels using the mobile industry processor interface display serial interface (MIPI DSI) and TV or monitor with the DisplayPort interface
- MIPI DSI: defines the protocols between a host processor and peripheral devices that adhere to the MIPI Alliance specifications for mobile device interfaces
- DisplayPort: serves as a digital display interface, primarily connecting video sources to display devices such as computer monitors, and can also transmit audio, USB, and other data forms
libdrm APIs expose the hardware capabilities of the Adreno DPU engines.
See Hardware SoCs that are supported on Qualcomm® Linux®.
Display architecture
This information explains the primary components within the hardware and the software architecture of the Qualcomm Linux display subsystem.Display hardware architecture
The hardware architecture includes components for source and destination processing, layer mixing, compression, and display interfaces.
Figure: DPU hardware architecture block diagram
| Component | Description |
|---|---|
| Bus interface | Fetches data from memory for processing |
| Source surface processing | Reads RGB and YUV surfaces from games and video applications. Performs format conversion and quality improvements for the source. |
| Blending | Blends and mixes the source surfaces together |
| Destination surface processing | Converts, corrects, and adjusts the data based on panel characteristics |
| Compression | Reduces bandwidth and power consumption by sending compressed display buffers to the display |
| Display interface | Generates timings for the connected display peripherals |
Display software architecture
The display subsystem consists of Wayland, a display server protocol, and its compositors, such as Weston. Wayland uses a client-server model where the client application interacts with the Wayland server.
Figure: Display software architecture block diagram
| Component | Description |
|---|---|
| Wayland sink | The Wayland sink plug-in communicates with the Weston subsystem to render the display. |
| Wayland compositor (Weston) | The Wayland compositor uses the Wayland protocol as a display server. The compositor handles the composition and rendering requirements at the system level and runs as a separate process in the system. Weston serves as the reference implementation of a Wayland compositor. |
| Direct rendering manager (DRM) backend | The DRM backend software framework manages the Qualcomm Adreno DPU hardware resources. It selects the optimal composition strategy for each connected display and allocates display processor hardware resources for the layer stack received from the client. |
libdrm | The libdrm library provides APIs for accessing DRM I/O control (IOCTL). |
| DRM/KMS framework | The DRM/KMS framework offers kernel and user-space level interface, with the help of libdrm libraries to access the related hardware features, configuration, and hardware acceleration. |
| Adreno DPU driver | The Adreno DPU driver manages all the pixel data paths to different panel interfaces. |
| Adreno DPU | The Adreno DPU is a hardware-accelerated engine that performs image processing and interfacing with minimal power consumption. |
Software APIs
Qualcomm Linux provides the following display APIs:- Weston API: facilitates interactions with the DRM compositor. For the Weston APIs, see Wayland client APIs and Wayland server APIs.
libdrmAPI: facilitates interactions with the DRM/KMS framework. For the APIs, see libdrm.