/boot_images/boot/Settings/Soc/<Chipset>/Core/SocInfra/TLMM/<Chipset>-pinctrl.dtsi/boot_images/boot/Settings/Soc/<Chipset>/Core/SocInfra/TLMM/tlmm.dtsi
| Property name | Property description | Data type | Possible values/value range | Device behavior |
|---|---|---|---|---|
sleep-config | GPIO configuration settings as defined in <Chipset>-pinctrl.dtsi. The configurations are applied on device boot up. | UINT32 | Pin direction: - GPIO_INPUT – 0x1- GPIO_OUTPUT – 0x2Pin pull configuration: - GPIO_PULL_DOWN – 0x4- GPIO_PULL_UP – 0x8- GPIO_NO_PULL – 0x10- GPIO_KEEPER – 0x20Pin output: - GPIO_OUT_LOW – 0x40- GPIO_OUT_HIGH – 0x80- GPIO_PRG_YES – 0x100- GPIO_PRG_NO – 0x000 | The default value is GPIO_INPUT.GPIO_INPUT: Allows the state of an input pin to be read.GPIO_OUTPUT: Controls the state of an output pin.The default value is GPIO_PULL_DOWN.GPIO_PULL_DOWN: Logic 0 connected to Ground.GPIO_PULL_UP: Logic 1 connected to Vdd supply.GPIO_NO_PULL: Floating/High Impedance state.GPIO_KEEPER: Maintains the previous state of the GPIO. When a SoC enters the deepest power-saving mode, this configuration is applied.The default value is GPIO_OUT_LOW.GPIO_OUT_HIGH: Logic high connected to Vdd.The default value is GPIO_PRG_NO.GPIO_PRG_YES: Ensures that any unused GPIOs remain in a low-power state after bootup.For example, (GPIO_INPUT GPIO_PULL_DOWN GPIO_OUT_LOW GPIO_PRG_NO) /* PIN 10 */ |
ngpios | Number of read only GPIO pins in chipset. | UINT32 | – | For example, ngpios = <175>;. |
width | Each GPIO pin has its own set of read only control registers. Width indicates pin to pin register offset. | – | – | For example, width = <0x1000>;. |
id | Hardware instance of read only GPIO pad ID. | UINT32 | – | For example, id = <0x0>;. |
version | GPIO read only driver version. Driver 1.0 refers as 0x1. | UINT32 | – | For example, version = <0x1>;. |
gpio-controller | Identifier to represent the read only connected device as a GPIO device. | String | – | – |
phandles for pin configurations | Mux configuration that is used to configure the alternative functionality of GPIOs. For more information, see Pin descriptions. | – | sdc4_data_1: sdc4_data_1 { mux = <13 3>; }; | On bootup, the GPIO configures to alternate functionality of GPIO. For example, sdc4_data_1: sdc4_data_1 { mux = <13 3> };. In this example, 13 refers to the GPIO number and 3 indicates the alternate function selection. |

