Skip to main content
The PMIC is a specialized electronic component that manages various power supply requirements within a device. The PMIC oversees power supply requirements, including the following:
  • Battery management tasks such as charging and gauging.
  • User interface components such as flash, display, and RGB color space.
  • System-on-chip (SoC) infrastructure elements such as clocks, analog-to-digital converters (ADC), and power-on (PON) functions.
Some PMIC resources can be customized in XBL through the XBL_CFG image. Configuring the PMIC XBL DT properties ensure optimal performance and integration. You can perform these customizations using a DT framework. The PMIC DTSI files for the Linux device are at boot_images/boot/Settings/Soc/<Chipset>/Core/PMIC/pm.dtsi, access.dtsi.
Property nameProperty descriptionData typePossible values / value rangeDevice behavior
s2-kpdpwrEnable PMIC power key pin reset configuration.Boolean• PM_TRUE
• PM_FALSE		The power key is configured to reset or shut down the device when asserted for durations specified in s1-ms and s2-ms. For PM_FALSE, hardware default settings are used.
reset-typeSelect the reset type.UINT8• PM_WARM_RESET
• PM_HARD_RESET
• PM_SHUTDOWN		• WARM_RESET: crash dump collection
• HARD_RESET: reboot
• SHUTDOWN: shutdown
s1-msAssertion time (choose from supported values).UINT320, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256KPDPWR_N_RESET_S1_TIMER in ms
s2-msAssertion time (choose from supported values).UINT320, 10, 50, 100, 250, 500, 1000, 2000KPDPWR_N_RESET_S2_TIMER in ms
s2-kpdpwr-resinConfigure PMIC power and resin key combination.Boolean• PM_TRUE
• PM_FALSE		Both power and resin key combinations apply for durations in s1-ms and s2-ms. For PM_FALSE, hardware defaults are used.
reset-typeSelect the reset type.UINT32• PM_WARM_RESET
• PM_HARD_RESET
• PM_SHUTDOWN		WARM_RESET: crash dump, HARD_RESET: reboot, SHUTDOWN: shutdown
s1-msAssertion time (select supported value).UINT320, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256RESIN_AND_KPDPWR_RESET_S1_TIMER in ms
s2-msAssertion time (select supported value).UINT320, 10, 50, 100, 250, 500, 1000, 2000RESIN_AND_KPDPWR_RESET_S2_TIMER in ms
s2-resinConfigure resin key pin used as volume down.Boolean• PM_TRUE
• PM_FALSE		Resin key can reset or shut down device when asserted for s1-ms / s2-ms. For PM_FALSE, hardware defaults apply.
reset-typeSelect the reset type.UINT8• PM_WARM_RESET
• PM_HARD_RESET
• PM_SHUTDOWN		WARM_RESET: crash dump, HARD_RESET: reboot, SHUTDOWN: shutdown
s1-msAssertion time (select supported value).UINT320, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256RESIN_N_RESET_S1_TIMER in ms
s2-msAssertion time (select supported value).UINT320, 10, 50, 100, 250, 500, 1000, 2000RESIN_N_RESET_S2_TIMER in ms
s3-resetConfigure S3 reset.Boolean• PM_TRUE
• PM_FALSE		Used as fail‑safe reset or factory reset when S2 reset fails. Triggered after timer expiry.
s3-srcSelect the reset source.UINT8• PM_PON_RESET_SOURCE_KPDPWR
• PM_PON_RESET_SOURCE_RESIN
• PM_PON_RESET_SOURCE_RESIN_AND_KPDPWR
• PM_PON_RESET_SOURCE_RESIN_OR_KPDPWR		Power key, resin key, or combination
timervalue-msAssertion time for S3 reset.UINT320, 8, 16, 32, 63, 125, 240, 500, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000RESET_S3_TIMER_n in ms
uvlo-configConfigure under‑voltage lockout threshold.UINT8PMIC_A, PMIC_B, PMIC_C, PMIC_D, PMIC_E, PMIC_I, PMIC_KDevice shuts down when UVLO threshold is reached.
uvlo_threshUVLO threshold.UINT32mVThreshold in millivolts
uvlo_hystUVLO hysteresis.UINT32mVHysteresis in millivolts
uvlo_enableEnable UVLO config.BooleanPM_ENABLE, PM_DISABLEFor PM_DISABLE, hardware defaults are applied.
ovlo-configConfigure over‑voltage lockout threshold.PMIC_INDEXPMIC_A–PMIC_KDevice shuts down when OVLO threshold is reached.
ovlo_threshOVLO threshold.–mVThreshold in millivolts
ovlo_hystOVLO hysteresis.–mVHysteresis in millivolts
ovlo_enableEnable OVLO config.–PM_ENABLE, PM_DISABLEFor PM_DISABLE, hardware defaults are applied.
Long-pwrkey-dbnc-chkPower‑key debounce check during boot.UINT32msecDevice shuts down if key not pressed within debounce window.
chk-atStage to check keypress.UINT80, 1, 20: no check, 1: XBL Loader, 2: XBL core (UEFI)
sw-configModify PMIC SW config during boot for LDO, SMPS, clocks, GPIOs.UINT32PM_EVENT_LOG_LEVEL_*Controls verbosity of PON logs in UART.
ChargerCharger configuration group.UINT32PMIC_D / PMIC_IPrimary charger PMIC index.
no-batt-cfg-enableEnable battery‑less configuration.UINT8PM_TRUE, PM_FALSEDevice boots automatically if battery is not detected.
Secondary-charger-presentIndicate secondary charger presence.UINT8PM_TRUE, PM_FALSESecondary charger settings.

​
SMPS/LDO/CLK sample code

driver-post-init = <
      // PM_SMPS_SET_AHC_HR        PM_BUSID_0   PMIC_C  PM_SMPS_1    0x57
      // PM_SMPS_SET_ULS           PM_BUSID_0   PMIC_F  PM_SMPS_6    1375000          /*The Voltage is in microVolts*/
      // PM_LDO_SET_ULS            PM_BUSID_0   PMIC_F  PM_SMPS_6    1375000          /*The Voltage is in microVolts*/
      // PM_CLK_ENABLE             PM_BUSID_0   PMIC_A  PM_CLK_RF_1  PM_TRUE
      // PM_SMPS_SET_VOLT          PM_BUSID_0   PMIC_B  PM_SMPS_1    1200
      // PM_SMPS_SET_AHC           PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_FALSE
      // PM_LDO_SET_AHC            PM_BUSID_0   PMIC_B  PM_LDO_1     PM_FALSE
      // PM_LDO_SET_VOLT           PM_BUSID_0   PMIC_B  PM_LDO_1     1200
      // PM_LDO_SET_MODE           PM_BUSID_0   PMIC_B  PM_LDO_1     PM_SW_MODE_NPM
      // PM_SMPS_SET_MODE          PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_SW_MODE_NPM
      // PM_SMPS_SET_PD_CTRL       PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_SMPS_SET_PIN_CTRL      PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_SMPS_SET_OCP_BROADCAST PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_LDO_SET_PD_CTRL        PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_LDO_SET_PIN_CTRL       PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_LDO_SET_OCP_BROADCAST  PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_CLK_DRV_STR            PM_BUSID_0   PMIC_A  PM_CLK_RF_1  3
      // PM_SMPS_SET_ENABLE        PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_LDO_SET_ENABLE         PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_SPMI_CLK_DATA_CFG      PM_BUSID_0   PMIC_A  0x2          0x2              /*BUS_ID, PMIC_ID, CLK buff Config, DATA buff Config*/
      PM_DELAY(10)
      > ;