| Area | Minimum validation |
|---|---|
| Boot | Image load, reset-vector programming, stable first instruction fetch, repeatable reboot. |
| Interrupts | Correct routing, clean ISR entry and exit, and spurious interrupt checks. |
| UART | Console behavior, receive handling, and any enabled flow-control behavior. |
| I2C | Read and write behavior, NACK handling, repeated-start behavior, timeout detection, and recovery |
| I3C | Addressing policy, transfer completion, and supported compatibilitypath behavior. |
| QUP plus GPI | Descriptor queueing, completion IRQs, ring reset or drain, timeout, and abort behavior. |
| Power | D0, D1, D2, and platform-specific D3 transition checks, wakesource correctness, and no lost context |
| Resource voting | Correct assertion and release timing for clocks, rails, and paths. |
| Diagnostics | Crash logs, trace, and fault artifacts usable for root-cause analysis |
Validation matrix
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