sdhc_2: mmc@8804000 node describes the on-chip SDHC host controller and is typically within the SoC DTSI file. For example, <workspace_root_path>/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi file.
These parameters are only for information purposes. Don’t modify them.
| Property | Description |
|---|---|
Compatible | Specify compatible strings such as qcom,sc7280-sdhci, qcom,sdhci-msm-v5. |
Pinctrl-names | Defines name of the pin control states. |
Pinctrl-0 &1 | Points to pin control settings. This is an array that defines pin control settings for multiple states. |
Interrupts | Interrupt mapping for SDHC IRQ. |
Interrupt-names | Lists the names corresponding to each interrupt defined in the interrupts property. |
reg | SDHC host registers address mapping. |
iommus | Iommus specifies the IOMMU node and stream ID. |
clock-names | List of clock input name strings. |
clocks | List of phandle and clock specifier pairs. |
interconnects | Defines the interconnect paths for the device. |
interrupt-names | Lists the names to each interconnect path defined in interconnects property. |
power-domains | Specifies the power domain used by the SDHC. |
bus-width | Specifies the number of data lines used for communication. |
dma-coherent | Specifies that the SDHCI and CPU maintain cache coherency. |
qcom,dll-config | Platform specific settings for DLL_CONFIG reg. |
resets | Reset node register. |
sdhc2_opp_table | This table defines various operating points supported by the SDHCI. |