Configure UFS Linux kernel device tree - Qualcomm Dragonwing Documentation

The SoC DTSI node specifies register address space, clocks, interrupts, and reset information. The platform DTSI node specifies power supply, voltage, and current levels. The Ufs_mem_hc node that describes the on-chip UFS device host controller is typically within the SoC DTSI file. For example, <workspace_root_path>/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi. For Ufs_mem_hc node in Dragonwing IQ-9075, see <workspace_root_path>/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sa8775p.dtsi.

These parameters are only for information purposes. Don’t change them.

Property	Description
`Compatible`	Qualcomm SoCs must contain strings such as `qcom`, `ufshc`.
`Interrupts`	Interrupt mapping for UFS host controller IRQ.
`Reg`	UFS host registers address mapping.
`Phys`	`phandle` to UFS device PHY node.
`lanes-per-direction`	Specify the number of lanes available per direction. Either 1 or 2.
`clock-names`	List of clock input name strings.
`Clocks`	List of `phandle` and clock specifier pairs.
`freq-table-hz`	Array of <minimum maximum> operating frequencies stored in the same order as the clocks property.
`reset-gpios`	A `phandle` and GPIO specifier denoting the GPIO that is connected.
`Resets`	Reset node register.

The Ufs_mem_phy node describes the on-chip UFS device PHY hardware and is typically within the SoC DTSI file. For example, <workspace_root_path>/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi file.

Property	Description
`Compatible`	Specify compatible string such as `qcom`, `qmp-ufs-phy`.
`#phy-cells`	Set the property to 0.
`Reg`	Should contain PHY register address space.
`reg-names`	Indicates various resources passed to driver (through the reg property) by name. The required `reg-names` is `phy_mem`.
`lanes-per-direction`	Number of lanes available per direction; either 1 or 2.
`clock-names`	List of clock input name strings.
`clocks`	List of phandle and clock specifier pairs.
`vdda-phy-supply`	`phandle` to main PHY supply for analog domain.
`vdda-pll-supply`	`phandle` to PHY PLL and Power-Gen block power supply.
`Resets`	Specifies the PHY reset in the UFS device controller.

For more information about DTS parameters, see /kernel_platform/msm-kernel/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml.