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A system-on-chip (SoC) sleep state is a low power mode that the entire SoC enters when the device is idle or not actively running any use cases.
  1. Review SoC Sleep state functionality.
    The SoC supports many sleep states based on resource availability:
    • DDR (Double data rate memory)
    • XO (Crystal oscillator) clock
    • (Chip_CX) (Digital power supply)
    • (Chip_MX) (Memory domains power supply)
Note The SoC sleep states are enabled on QCS6490/QCS5430 and Qualcomm® Dragonwing™ IQ-615.
  1. Understand sleep transition.
As the device transitions from active state to SoC sleep state, the power consumption decreases. For example, when the device is idle with no use cases running, it’s in the SoC sleep state (AOSD). This is the deepest sleep state and consumes the least power. In this state, the resources, such as, XO clock, memory, and power supply of digital and memory domains also enter their respective sleep states.
  1. Learn the SoC sleep states and their resource states:
Note The SoC sleep states listed in the table are for reference only. You can’t enable or disable SoC sleep states. Table : SoC sleep states
SoC sleep statesResource states
Active
  • XO clock on
  • Chip_CX (Digital) and Chip_MX (Memory) power domains operate at active voltage level
DDR collapse
  • Memory in Self-Refresh mode
  • XO clock on
  • Chip_CX and Chip_MX power domains are configured with active voltage
XO shutdown (CXSD)
  • Memory in Self-Refresh mode
  • XO clock off
  • Chip_CX power domain configured with least voltage
  • Chip_MX configured with active voltage
SoC sleep (AOSD)
  • The deepest system sleep state where the system is expected to achieve the lowest sleep power, which is the most preferred state for optimal power management
  • Memory in Self-Refresh mode
  • XO clock off
  • Chip_CX and Chip_MX power domains configured with the least voltage

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Verify system-on-chip sleep state

Transitioning to the sleep state significantly reduces power consumption. To ensure power efficiency, the device should enter sleep state, whenever it’s idle. To verify that the device has successfully entered sleep state, it’s essential to retrieve the SoC sleep statistics.
Run the following commands, to retrieve SoC sleep statistics:
  1. Mount debug file system to access device debugfs nodes
mount -t debugfs none /sys/kernel/debug
  1. Run the following command to retrieve AOSD sleep statistics:
cat /sys/kernel/debug/qcom_stats/aosd
  1. Run the following command to retrieve CXSD sleep statistics
cat /sys/kernel/debug/qcom_stats/cxsd
The following is a sample output: Count: 3 Last Entered At: 1087943710378 Last Exited At: 1088442890377 Accumulated Duration: 6668562002 The following table explains the output fields: Table : SoC sleep states output fields
FieldExplanation
Count
  • Indicates the number of times the SoC entered a particular power state
  • A nonzero count indicates that the SoC has exercised sleep states
Last Entered AtIndicates the last sleep entry timestamp in ticks
Last Exited AtIndicates the last sleep exit timestamp in ticks
Accumulated durationTotal amount of time in sleep, represented in ticks
Note The 19.2 MHz XO clock determines the system tick frequency.

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