Ethernet architecture

The following figure shows the architecture and its components involved in communicating data over Ethernet on the reference kits.

The following table describes the components of Ethernet architecture on QCS6490.

Component	Description
Application processor subsystem (APSS)	Runs on a Linux-based operating system.
Ethernet driver	A software driver in the Linux kernel. Provides data connectivity over a wired Ethernet interface.
PHY driver	A low-level driver dedicated to manage the Ethernet physical layer. Implements a software state machine required to handle the life cycle of PHY, from initialization to link establishment. Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Ethernet hardware (RB3 Gen 2 Development Kit)	Both QEP and AQR PHYs are validated on RB3 Gen 2 Development Kit. QEP PHY for 2.5 GbE is available by default on SGMII interface. It’s enabled and verified on a 1 x QEP8121 IX connector. USB2ETH interface with 1 GbE is available by default and verified on RJ45 connector. AQR PHY for 10 GbE is optional and may not be available on the development kit. If available, it’s verified on a 1 x AQR113C IX connector. The sample outputs shown in tools for ethernet operations are based on the verification of QEP8121 PHY, USB2ETH, and AQR113C PHY. To bring up hardware configurations other than the configuration provided by Qualcomm, see Bring up alternate hardware enablement. For information on how to configure RJ45 based USB2ETH, see Configure Ethernet with RJ45

The following table describes the components of Ethernet architecture on IQ-9075.

Component	Description
Application processor subsystem (APSS)	Runs on a Linux-based operating system.
Ethernet driver	A software driver in the Linux kernel. Provides data connectivity over a wired Ethernet interface.
PHY driver	A low-level driver dedicated to manage the Ethernet physical layer. Implements a software state machine required to handle the life cycle of PHY, from initialization to link establishment. Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Ethernet hardware	1 x QEP8121 PHY for 10/100/1000/2500 Mbps is validated on IQ-9075 EVK and enabled by RJ45 connector.

The following table describes the components of Ethernet architecture on IQ-9075 EVK with Mezzanine card.

Component	Description
Application processor subsystem (APSS)	Runs on a Linux-based operating system.
Ethernet driver	A software driver in the Linux kernel. Provides data connectivity over a wired Ethernet interface.
PHY driver	A low-level driver dedicated to manage the Ethernet physical layer. Implements a software state machine required to handle the life cycle of PHY, from initialization to link establishment. Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Ethernet hardware	The following interfaces are validated on IQ-9075 EVK with Mezzanine card and enabled by RJ45 connectors. 1 x QEP8121 PHY for 10/100/1000/2500 Mbps 1 x QPS615 + AQR113C PHY for 100/1000/2500/5000/10000 Mbps 1 x QPS615 + QEP8121 PHY for 10/100/1000/2500 Mbps

The following table describes the components of Ethernet architecture on IQ-8275.

Component	Description
Application processor subsystem (APSS)	Runs on a Linux-based operating system.
Ethernet driver	A software driver in the Linux kernel. Provides data connectivity over a wired Ethernet interface.
PHY driver	A low-level driver dedicated to manage the Ethernet physical layer. Implements a software state machine required to handle the life cycle of PHY, from initialization to link establishment. Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Ethernet hardware	1 x QEP8121 PHY for 10/100/1000/2500 Mbps is validated on IQ-8275 EVK and enabled by RJ45 connector.

The following table describes the components of Ethernet architecture on IQ-8275 EVK with Mezzanine card.

Component	Description
Application processor subsystem (APSS)	Runs on a Linux-based operating system.
Ethernet driver	A software driver in the Linux kernel. Provides data connectivity over a wired Ethernet interface.
PHY driver	A low-level driver dedicated to manage the Ethernet physical layer. Implements a software state machine required to handle the life cycle of PHY, from initialization to link establishment. Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Ethernet hardware	The following interfaces are validated on IQ-8275 EVK with Mezzanine card and enabled by RJ45 connectors. 1 x QPS615 + AQR113C PHY for 100/1000/2500/5000/10000 Mbps 1 x QPS615 + QEP8121 PHY for 10/100/1000/2500 Mbps

The following table describes the components of Ethernet architecture on IQ-615.

Component	Description
Application processor subsystem (APSS)	Runs on a Linux-based operating system.
Ethernet driver	A software driver in the Linux kernel. Provides data connectivity over a wired Ethernet interface.
PHY driver	A low-level driver dedicated to manage the Ethernet physical layer. Implements a software state machine required to handle the life cycle of PHY, from initialization to link establishment. Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Ethernet hardware	1 x KSZ9031RNX PHY for 1000 Mbps is validated on IQ-615 EVK and enabled by RJ45 connector.

Next steps

Bring up Ethernet

Perform Ethernet operations

Configure Ethernet features

Troubleshoot Ethernet issues