CONFIG_QCOM_CLK_GP_MND=m

--- a/drivers/pinctrl/qcom/pinctrl-qcs615.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs615.c
@@ -404,6 +404,7 @@ enum qcs615_functions {
      msm_mux_emac_phy_intr,
      msm_mux_forced_usb,
      msm_mux_gcc_gp,
+      msm_mux_gp_mn,
      msm_mux_gp_pdm,
      msm_mux_gps_tx,
      msm_mux_hs0_mi2s,
@@ -581,6 +582,10 @@ static const char *const gcc_gp_groups[] = {
      "gpio59", "gpio78",
};

+static const char *const gp_mn_groups[] = {
+      "gpio29",
+};
+
static const char *const gp_pdm_groups[] = {
      "gpio8", "gpio54", "gpio63", "gpio66",
      "gpio79", "gpio95",
@@ -840,6 +845,7 @@ static const struct pinfunction qcs615_functions[] = {
      MSM_PIN_FUNCTION(emac_phy_intr),
      MSM_PIN_FUNCTION(forced_usb),
      MSM_PIN_FUNCTION(gcc_gp),
+      MSM_PIN_FUNCTION(gp_mn),
      MSM_PIN_FUNCTION(gp_pdm),
      MSM_PIN_FUNCTION(gps_tx),
      MSM_PIN_FUNCTION(hs0_mi2s),
@@ -929,7 +935,7 @@ static const struct msm_pingroup qcs615_groups[] = {
      [26] = PINGROUP(26, EAST, cci_async, hs1_mi2s, jitter_bist, _, _, _, _, _, _),
      [27] = PINGROUP(27, EAST, hs1_mi2s, pll_bist, _, _, _, _, _, _, _),
      [28] = PINGROUP(28, EAST, cam_mclk, agera_pll, qdss_gpio, _, _, _, _, _, _),
-      [29] = PINGROUP(29, EAST, cam_mclk, _, qdss_gpio, atest_tsens, _, _, _, _, _),
+      [29] = PINGROUP(29, EAST, cam_mclk, gp_mn, qdss_gpio, atest_tsens, _, _, _, _, _),
      [30] = PINGROUP(30, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
      [31] = PINGROUP(31, EAST, cam_mclk, _, qdss_gpio, _, _, _, _, _, _),
      [32] = PINGROUP(32, EAST, cci_i2c, _, qdss_gpio, _, _, _, _, _, _),

CONFIG_QCOM_CLK_GP_MND=m

gp_mn_active: gp_mn_active-state {
	pins = "gpio29";
	function = "gp_mn";
	drive-strength = <2>;
	bias-disable;
};

gp_mn: clock-controller@88d3000 {
	compatible = "qcom,clk-gp-mnd";
	reg = <0x0 0x088d3000 0x0 0xc>;
	clocks = <&gcc GCC_PDM_XO4_CLK>,
	         <&gcc GCC_PDM_AHB_CLK>;
	clock-names = "pdm_clk", "ahb_clk";
	clock-output-names = "gp_mn_clk";
	#clock-cells = <0>;
	pinctrl-names = "active";
	pinctrl-0 = <&gp_mn_active>;
	assigned-clocks = <&gcc GCC_PDM_XO4_CLK>;
	assigned-clock-rates = <4800000>;
};

CONFIG_QCOM_CLK_GP_MND=m