I2C features - Qualcomm Dragonwing Documentation

Subsystem	Transfer mode	Description
RTSS	FIFO polling	Supports 100 kHz, 400 kHz, and 1000 kHz bus speeds. Supports 7‑bit target address according to the I²C specification.

I²C interface components

The devicetree source is at sail_proc/BSP/scripts/lemansau-sailhyp.dts.

I²C APIs

The I²C APIs for the RTSS are listed at sail_proc/BSP/i2c/public.

I²C software devicetree configuration

To enable I²C, configure I²C using the devicetree node. The following is an example of devicetree node:

se0_i2c: qupv3_se0_i2c {
                    reg-base = <0xF1900000>;
                    slave-addr = <0x28 0x29 0x12 0x11 0x13 0x15 0x17>;
                    clock-name = <clock_name>;
                    clock-frequency = <19200000>;
                    interrupt = <402>;
                    pinctrl = <address node of pinctrl>;
                    i2c-mode = <2>;
                    addressing-mode = <1 1 1 2 2 2 2>;
                    timestamp = <0 0 0 0 0 0 0>;
                    precmd-delay = <0 0 0 0 0 0 0>;
                    access-mode = <0>;
                    status = <1>;
};

Verify I²C interface

For information about verifying the I²C interface, see the i2cel1 section in RTSS test commands.

​I2C interface components

​I2C APIs

​I2C software devicetree configuration

​Verify I2C interface

I²C interface components

I²C APIs

I²C software devicetree configuration

Verify I²C interface