UART - Qualcomm Dragonwing Documentation

Subsystem	Transfer mode	Description
RTSS	FIFO (low sleep) DMA	Supports 9600, 115200, 230400, and 921600 baud rates. The FIFO mode transfers data between its Rx/Tx buffers and system memory. The DMA mode transfers data between its Rx/Tx buffers and system memory. Enhanced performance is achieved through high-speed UART drivers that support higher baud rates and larger data packets. For example, the Bluetooth^® wireless technology connectivity modules.

UART interface components

The devicetree source is at sail_proc/BSP/scripts/lemansau-sailhyp.dts.

UART APIs

The UART APIs for the RTSS are listed at sail_proc/BSP/uart/public/uart.h.

UART software devicetree configuration

To enable UART, configure UART using the devicetree node. The following is an example of devicetree node:

se2_uart: qupv3_se2_uart {
                     reg-base = <0xF1908000>;
                     clock-name = <clock_name>;
                     clock-frequency = <7372800>;
                     baudrate = <115200>;
                     interrupt = <404>;
                     pinctrl = <address node of pinctrl>;
                     pinctrl-monaco = <address node of pinctrl>;
                     parity = <4>;
                     stop-bit = <0>;
                     access-mode= <2>;
                     loopback  = <0>;
                     status = <1>;
};

​UART interface components

​UART APIs

​UART software devicetree configuration

UART interface components

UART APIs

UART software devicetree configuration