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The following table lists the device interface features in Dragonwing IQ-X5121. Table : Dragonwing IQ-X5121 device interfaces
3xQUP v3 serial engine
Serial engine instancesQUPV3_0QUPV3_1QUPV3_2
Application processor QUP v3 serial engine888
LPI QUP v3 serial engine9––
USB controller details
PCIe controller details

QUP v3 mapping to protocols and GPIOs in Dragonwing IQ-X5121

Dragonwing IQ-X5121 contains 33 QUP v3 serial engines. Of these, 24 QUP v3 serial engines are allocated for the application processor and 9 QUP v3 serial engines are allocated for the low-power island (LPI). Select only one protocol in a QUP v3 serial engine at a time. For example, simultaneous UART and I2C functions aren’t supported. The top-level QUP v3 serial engines are used by the application processor and boot image. The LPI QUP v3 serial engines are used by the sensor subsystem. The following table lists the default QUP v3 mapping to protocols and GPIOs. Table : Dragonwing IQ-X5121 QUP v3 serial engine protocol mapping
QUP v3 serial engineProtocolsQUP lane to GPIO mapping
UARTHS UARTI2C-MSPI-ML0L1L2L3L4L5L6
QUP_0SE0YesYesYesYes0123–––
SE1YesYesYesYes4567–––
SE2YesYesYesYes891011171819
SE3YesYesYesYes12131415232221
SE4YesYesYesYes16171819–––
SE5YesYesYesYes20212223–––
SE6YesYesYesYes24252627–––
SE7YesYesYesYes14151213–––
QUP_1SE0YesYesYesYes32333435–––
SE1YesYesYesYes36373839–––
SE2YesYesYesYes40414243495051
SE3YesYesYesYes44454647353433
SE4YesYesYesYes48495051–––
SE5YesYesYesYes52535455–––
SE6YesYesYesYes56575859–––
SE7YesYesYesYes54555253–––
QUP_2SE0YesYesYesYes64656667–––
SE1YesYesYesYes68697071–––
SE2YesYesYesYes72737475818283
SE3YesYesYesYes76777879676665
SE4YesYesYesYes80818283–––
SE5YesYesYesYes84858687–––
SE6YesYesYesYes88899091–––
SE7YesYesYesYes86878485–––
LPI_QUPSE0––Yes–215216–––––
SE1––Yes–217218231232–––
SE2––YesYes219220221222223––
SE3––Yes–223224–––––
SE4––YesYes225226227228221222–
SE5Yes–––––229230–––
SE6Yes–Yes–231232231232–––
SE7––Yes–233234–––––
SE8––Yes–235236–––––